Tabbed Routing 阻抗能力探究  

Tabbed routing impedance capability inquiry

作　　者：张志超 陈富嘉 彭镜辉 蓝小强 黎钦源 Zhang Zhichao;Chen Fujia;Peng Jinghui;Lan Xiaoqiang;Li Qinyuan

机构地区：[1]广州广合科技股份有限公司,广东广州510730

出　　处：《印制电路信息》2024年第S01期34-42,共9页Printed Circuit Information

摘　　要：高速服务器主板主芯片到存储器的高速信号传输通过Double Data Rate(简称DDR)技术实现,传输高速信号的连接线简称为DDR阻抗线。因主芯片相对存储器位置能布设管脚的空间要小,从主芯片到存储器的DDR高速阻抗线呈扇出形状,主芯片位置的阻抗线线宽相对存储器位置要小,存在阻抗不连续问题。对靠近主芯片位置的DDR阻抗线增加规则的凸耳状走线可提升整段DDR阻抗不匹配问题。增加规则的凸耳走线的阻抗线又称Tabbed Routiing阻抗(简称TAB阻抗)。探究布设不同形状和不同尺寸的TAB设计来提升阻抗不连续问题,根据材料等级选择一种最佳的布线设计模式,对TAB阻抗设计及生产制作控制都有较大指导意义。The high-speed signal transmission from the main chip of the high-speed server to the memory is realized by Double Data Rate(DDR)technology,and the connection line for high-speed signal transmission is referred to as DDR impedance line.Because the main chip has less space to lay pins relative to the memory position,the DDR high-speed impedance line from the main chip to the memory is fan-out,and the impedance line width of the main chip position is smaller than that of the memory position,resulting in impedance discontinuity problems.Adding regular convex lines to the DDR impedance line near the main chip position can improve the impedance mismatch problem of the entire section of DDR.The impedance line of the increased regular convex lines is also called the Tabbed Routing impedance(TAB impedance).Exploring the problem of impedance discontinuity by laying TAB designs of different shapes and sizes and selecting an optimal wiring design mode according to material grade has great guiding significance for TAB impedance design and production control.

关 键 词：高速服务器主板 高速传输信号 

分 类 号：TN41[电子电信—微电子学与固体电子学]