基于多逻辑域的逻辑综合研究进展  

Research progress of logic synthesis based on multi-logic domain

作　　者：储著飞[1] 王伦耀[1] 夏银水[1] CHU Zhufei;WANG Lunyao;XIAYinshui(Faculty of Electrical Engineering and Computer Science(EECS),Ningbo University,Ningbo 315211,China)

机构地区：[1]宁波大学信息科学与工程学院,宁波315211

出　　处：《微纳电子与智能制造》2021年第2期64-73,共10页Micro/nano Electronics and Intelligent Manufacturing

基　　金：国家自然科学基金(61871242);浙江省自然科学基金(LY19F040004);专用集成电路与系统国家重点实验室开放研究课题基金(2021KF008)项目资助

摘　　要：逻辑综合是集成电路设计自动化的重要步骤,随着集成电路规模的指数级增长和新的计算范式不断涌现,传统基于单逻辑的逻辑综合面临新的挑战。单逻辑域自动综合面临的主要问题是使用场景单一,针对高性能、低能耗、小面积等多应用场景,基于单逻辑域发展而来的工具不能有效解决面向多场景优化的难题。首先简述逻辑函数的表达方法和逻辑优化算法;其次针对多逻辑域的逻辑函数表达、优化和应用3个层面介绍多逻辑域的逻辑综合研究进展;最后对已有的开源逻辑综合工具和逻辑综合的未来发展趋势进行讨论。Logic synthesis is a critical step in integrated chip(IC)design automation.Traditional logic synthesis has many challenges as IC scale keeps increasing and new computing paradigms emerge.There is a problem with traditional logic synthesis in the flexibility of applications.For multiple scenarios such as high performance,low energy consumption,and small size,the tools developed based on single-logic-domain cannot effectively solve the challenges of multi-scenario-oriented optimization.We first briefly describe the logic representations and logic optimization algorithms.Then,we introduce the research progress of logic synthesis in multi-logic domains at three aspects:logic representation,logic optimization,and applications.We conclude by discussing current open-source logic synthesis tools and future trends in logic synthesis.

关 键 词：逻辑综合 逻辑优化 布尔逻辑 多数逻辑门 

分 类 号：TN402[电子电信—微电子学与固体电子学]