一种高频超宽带低插损大衰减范围CMOS数字步进衰减器  

A High Frequency Ultra-Wideband CMOS Digital Step Attenuator with Low Insertion Loss and Large Attenuation Range

作　　者：秦谋 袁波 陈罡子 李家祎 万天才 QIN Mou;YUAN Bo;CHEN Gangzi;LI Jiayi;WAN Tiancai(The 24th Research Institute of China Electronics Technology Group Corporation,Chongqing400060,P.R.China;Southwest Integrated Circuit Design Co.,Ltd.,Chongqing401332,P.R.China)

机构地区：[1]中国电子科技集团公司第二十四研究所,重庆400060 [2]重庆西南集成电路设计有限责任公司,重庆401332

出　　处：《微电子学》2022年第6期931-935,共5页Microelectronics

摘　　要：设计并实现了一种基于65 nm CMOS工艺的低插入损耗大衰减范围的高频超宽带数字步进衰减器。采用桥T型和π型衰减网络的开关内嵌式衰减结构,该结构具有端口匹配好、衰减精度高的特点;采用恒定负压偏置设计,减小了插入损耗,提高了高频超宽带性能;采用高匹配度的衰减位级联设计,实现了大衰减范围下的高精度衰减。经测试,在10 MHz~30 GHz频带范围内最大衰减量为31.5 dB,衰减步进为0.5 dB,参考态插入损耗<3.5 dB,衰减误差均方根值<0.45 dB。芯片总面积为2.30×1.20 mm^(2)。A high frequency ultra-wideband digital step attenuator with low insertion loss and large attenuation range was designed and implemented in a 65 nm CMOS process.Bridged-T andπ-type switch embedded attenuation structure was adopted for good port matching performance and high attenuation accuracy.Constant negative voltage bias was adopted to reduce insertion loss and improve ultra-wideband performance.Cascade design of attenuation cells with high matching was adopted to realize high attenuation accuracy under large attenuation range.The measured results show that the maximum attenuation value is 31.5 dB,the attenuation step is 0.5 dB,the insertion loss of reference state is less than 3.5 dB,and the rms of amplitude error is less than 0.45 dB at 10 MHz~30 GHz.The total chip size is 2.30×1.20 mm^(2).

关 键 词：数字衰减器 CMOS 超宽带 低插入损耗 

分 类 号：TN432[电子电信—微电子学与固体电子学]