一种基于循环ADC结构的可配置Pipeline ADC系统设计  

Reconfigurable Pipeline ADC Design Based on Cyclic ADC Architecture

作　　者：吴毅强[1] 吴金[1] 汪少康[1] 姚建楠[1] 

机构地区：[1]东南大学IC学院,南京210096

出　　处：《电子器件》2007年第6期2069-2072,2076,共5页Chinese Journal of Electron Devices

摘　　要：通过对Pipeline ADC系统的精度和工作频率可配置原理进行探讨,提出了一种新颖的精度和工作频率可配置Pipeline ADC设计理念,并对系统和子模块进行了设计.可配置的Pipeline ADC的精度可配置在8/10/12bit,工作频率可配置在10/20/40MHz.考虑电路中的增益有限性等因素的影响,使用Matlab对系统建模并仿真.系统仿真结果表明,可配置的Pipe-lineADC系统能够达到满意的SNR、有效位数等性能指标要求.This paper discusses the principle of reconfigurable pipeline ADC as an efficient solution for the ADC design in high data-rate multi-standard radio, and proposes a new reconfigurable pipeline ADC architecture based on cyclic ADC. The ADC has configures with 8/10/12 bit resolution and 10/20/40 MHz sampling frequency.Considered the errors of real circuit,the Matlab simulation result indicates that the system is effective.

关 键 词：循环 可配置 PIPELINE ADC 系统仿真 

分 类 号：TN911.7[电子电信—通信与信息系统]