Low-Power CMOS VCO with Dual-Band Local Oscillating Signal Outputs for 5/2.5-GHz WLAN Transceivers  

作　　者：CHI Baoyong(池保勇) SHI Bingxue(石秉学) 

机构地区：Institute of Microelectronics, Tsinghua University, Beijing 100084, China Institute of Microelectronics, Tsinghua University, Beijing 100084, China

出　　处：《Tsinghua Science and Technology》2003年第2期121-125,共5页清华大学学报（自然科学版（英文版）

基　　金：国家自然科学基金

摘　　要：The paper describes a low-power CMOS voltage-controlled oscillator (VCO) with dual-band local oscillating (LO) signal outputs for 5/2.5-GHz wireless local area network (WLAN) transceivers. The VCO is based on an on-chip symmetrical spiral inductor and a differential varactor. The 2.5-GHz quadrature LO signals are generated using the injection-locked frequency divider (ILFD) technique. The ILFD structure is similar to the VCO structure with its wide tracking range. The design tool ASITIC was used to optimize all on-chip symmetrical inductors. The power consumption was kept low with differential LC tanks and the ILFD technique. The circuit was implemented in a 0.18-μm CMOS process. Hspice and SpectreRF simulations show the proposed circuit could generate low phase noise 5/2.5-GHz dual band LO signals with a wide tuning range. The 2.5-GHz LO signals are quadrature with almost no phase and amplitude errors. The circuit consumes less than 5.3 mW in the tuning range with a power supply voltage of 1.5 V. The die area is only 1.0 mm×1.0 mm.The paper describes a low-power CMOS voltage-controlled oscillator (VCO) with dual-band local oscillating (LO) signal outputs for 5/2.5-GHz wireless local area network (WLAN) transceivers. The VCO is based on an on-chip symmetrical spiral inductor and a differential varactor. The 2.5-GHz quadrature LO signals are generated using the injection-locked frequency divider (ILFD) technique. The ILFD structure is similar to the VCO structure with its wide tracking range. The design tool ASITIC was used to optimize all on-chip symmetrical inductors. The power consumption was kept low with differential LC tanks and the ILFD technique. The circuit was implemented in a 0.18-μm CMOS process. Hspice and SpectreRF simulations show the proposed circuit could generate low phase noise 5/2.5-GHz dual band LO signals with a wide tuning range. The 2.5-GHz LO signals are quadrature with almost no phase and amplitude errors. The circuit consumes less than 5.3 mW in the tuning range with a power supply voltage of 1.5 V. The die area is only 1.0 mm×1.0 mm.

关 键 词：CMOS integrated circuits Frequency dividing circuits TRANSCEIVERS Variable frequency oscillators 

分 类 号：TN[电子电信]