纳秒延时同步脉冲产生器的设计与实现  

Design and realization of nanosecond digital delay and pulse generator

作　　者：代刚[1] 高平[1] 郭玉山[1] 欧阳艳晶[1] 贾兴[1] 

机构地区：[1]中物院流体物理研究所,绵阳621900

出　　处：《仪器仪表学报》2006年第z1期999-1000,共2页Chinese Journal of Scientific Instrument

摘　　要：纳秒延时同步脉冲产生器是按着预先设定的时间给出一系列的控制脉冲信号,用来控制测试过程中所有被控设备协同动作的一种电子学仪器,控制精度1ns。本文主要介绍了一种以高精度可编程延迟芯片(PDC)为核心的纳秒延时同步脉冲产生器的基本原理及其测试结果。并对其在应用中的抗干扰性进行了讨论。The nanosecond digital delay and pulse generator is an electronic instrument that can give corresponding time-series control pulse to ensure the equipment of the system to act according to the preestablished time.Its delay precision is 1ns.The core of the instrument is a high-programmable delay chip(PDC).The paper describes the basal principle and the test result of output signal of the instrument.The problem of the anti-jamming is discussed too in this paper.

关 键 词：纳秒延时 同步设备 可编程逻辑器件 延迟芯片 

分 类 号：TH7-55[机械工程—仪器科学与技术]