数字实验电路的MAX+PLUSⅡ与可编程逻辑器件设计  

Designing Digital Experimental Circuit with MAX+PLUSⅡ and Programmable Logic Device

作　　者：黄德润[1] 

机构地区：[1]福建教育学院数理系,福建福州350025

出　　处：《福建教育学院学报》2005年第7期115-118,共4页Journal of Fujian Institute of Education

摘　　要：本文介绍了应用新技术(MAX+PLUSII软件)和新器件PLD(可编程逻辑器件)设计七进制计数器实验电路的输入,项目编译,分配I/O管脚,波形仿真,定时分析和器件编程的全过程。并用VDHL语言编写了七进制计数器实验电路的文本输入。The introduction to this article uses the new technology (MAX +PLUSII software ) and new device PLD (programmable logic device ) to design the introduction of the experiment circuit of septenary counter , the project is compiled, assign I/O to manage the foot , wave form emulation , timing analysis and the whole course of device programming, and has written the text of the experiment circuit of septenary counter to input in VDHL language.

关 键 词：PLD 计数器 设计编译 性能仿真 器件编程 

分 类 号：TP391.9[自动化与计算机技术—计算机应用技术]