基于FPGA的非均匀信道化接收机的实现  

Non-equally divided channel receiver based on FPGA

作　　者：王静[1] 赵伟[2] 郭耀奎[1] 

机构地区：[1]大连海事大学,信息科学技术学院,辽宁大连116026 [2]青岛港湾学院,电气系,山东青岛266404

出　　处：《大连海事大学学报》2008年第z1期129-131,共3页Journal of Dalian Maritime University

摘　　要：阐述了基于多级滤波器组信道化接收机实现信道非均匀划分的原理及模型.采用现代DSP Builder设计工具和FP-GA硬件平台,对模型中关键的复信号多相滤波器组信道化接收机(PFCR)进行了4信道的设计实现.实验结果表明,采用FPGA可实现多信道非均匀划分.This paper elaborates the basic theory and model of non-equally divided channel based on multistage filterbank channel receiver.For the primary complex signal polyphase filterbank channel receiver(PFCR) in the model,4-channel design with the modern DSP development facility-DSP Builder on FPGA platform was realized experimentel result shows the feasibility of non-equally divided multi-channel based on FPGA.

关 键 词：信道非均匀划分 多相滤波器组信道化接收机 多速率信号处理 现场可编程门阵列 

分 类 号：TN971.1[电子电信—信号与信息处理]