基于FPGA的二次群复接器的设计与仿真  

Design and simulation of secondary group multiplexer in FPGA

作　　者：张玉薇[1] 邓珂[2] 

机构地区：[1]广西工学院信息与计算科学系,广西柳州545006 [2]广西工学院研究生处,广西柳州545006

出　　处：《广西工学院学报》2009年第1期15-18,共4页Journal of Guangxi University of Technology

基　　金：广西工学院硕士科研基金(070236)资助

摘　　要：为得到简单、实用、可移植性好的二次群数字复接器,以EDA法,通过对二次群数字复接器的功能剖析,建立其功能模块的原理图模型,用verilog语言对复接电路进行描述,并在Quartus Ⅱ环境中进行编译和仿真,得到了较理想的结果。实现了基群速率2048 kb/s的数字通信二次群的复接。本设计在其他电路里可直接调用,移植性好。In order to gain more simple and easily planted secondary group multiple connection,EDA technology is used.Upon the analysis of secondary group multiplexer,schematic diagram of functional modules has been found.Using verilog language to describe the secondary group multiplexer,supposed results have been obtained after translation and simulation in the environment of Max+Plus II,and thus the secondary group multiplexing of digital signals whose velocity is 2048 kb/s has been realized.Such a design can be tra...

关 键 词：二次群 数字复接 FPGA(现场可编程门阵列) 

分 类 号：TN791[电子电信—电路与系统]