DMB-T系统中FFT模块的设计与实现  

Design and Realization of FFT processor in DMB-T

作　　者：崔振[1] 王永贺[1] 门爱东[1] 

机构地区：[1]北京邮电大学电信工程学院,北京100876

出　　处：《电视技术》2008年第z1期6-7,29,共3页Video Engineering

摘　　要：介绍了地面数字多媒体/电视广播传播系统(DMB-T)中3780点FFT模块的重要作用。考虑到不适合直接利用现已成熟的基-2和基-4的算法,提出一种全并行流水结构的3780点FFT的设计和实现方案。该方案采用WFTA算法和PFA算法,把3780分解为7×9×5×4×3共5级的流水线结构。通过对整个系统的仿真与硬件实现,证明该方案性能上能够满足TDS-OFDM系统的信噪比要求。This paper introduces the important key technology of 3780-point FFT processor in the Terrestrial Digital Multimedia/ Television Broadcast and transmission system.The processor could not use the sophisticated tadix-2 or radix-4 algorithms directly.In this paper, the design and realization based on memory using FPGA,which adopts WFTA algorithm and PFA algorithm,is proposed. With the pipeline structure,3780 is discomposed into 7×9×3×5×4 and compute the 7,9,3,5,4-point DFT.The simulation and analysis of the whole system prove that it can meet the signal-to-quantization noise ratio requirement of the TDS-OFDM system.

关 键 词：快速傅立叶变换 WFTA算法 PFA算法 流水线 地面数字电视 GB20600-2006 

分 类 号：TN949.197[电子电信—信号与信息处理]