高速逻辑分析仪产品化设计的关键技术  

Key Techniques in Product Design of High-speed Logic Analyzer

作　　者：师奕兵[1] 王厚军[1] 

机构地区：[1]电子科技大学自动化工程学院,成都610054

出　　处：《仪器仪表学报》2002年第z3期38-40,共3页Chinese Journal of Scientific Instrument

基　　金：总装备部资助项目 ( I17B2 0 0 0 0 2 0 )

摘　　要：就笔者所承担型号项目“逻辑分析仪”的开发研制中的若干关键技术进行论述 ,着重阐述其系统设计的虚拟仪器概念与原理、基于低速器件的高速数据采集技术、基于软件设计的数据窗定位技术、以及基于系统调试与产品生产考虑的可测性设计。工作为我国高速逻辑分析仪的开发和生产奠定了基础。The key techniques in the development of logic analyzer,a product type project taken by the authors,are discussed,of which the concept and the theory of a virtual instrument in system design,the high-speed data acquisition technique based on the devices with lower operation speed,the data view window positioning technique based on the software design,and the design for testability concerning its debugging and production are expatiated emphatically.The work lays a foundation for the development of high-speed logic analyzer in our country.

关 键 词：逻辑分析仪 数据域测试 虚拟仪器 可测性 

分 类 号：TP2[自动化与计算机技术—检测技术与自动化装置]