基于FPGA的高效数字下变频的设计与实现  

Design and Realization of High Efficiency Digital Down Conversion Based on FPGA

作　　者：黄静月[1] 田克纯[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《广西通信技术》2011年第2期24-27,共4页Guangxi Communication Technology

摘　　要：介绍了一种基于软件无线电思想的高效数字下变频的实现方法,阐述了数字下变频中的数控振荡器、CIC滤波器、半带滤波器和低通滤波器的设计与实现。结合Matlab滤波器算法技术和在Quartus II系统下仿真,改进了滤波器组结构和参数。仿真结果表明,基于FPGA设计的数字下变频能够满足多制式短波电台性能指标要求,并且减少硬件资源消耗,具有灵活性、通用性和修改参数方便等特点。在多制式短波电台的应用中取得了较好的效果。A method of high efficiency digital down conversion is introduced.Then,we expatiate on the theory of NCO,CIC filter,HB filter and FIR.Combined matlab arithmetic technique of filter and simulation in quartus II,the filter structure and parameter is improved.The result of simulation indicates:high efficiency digital down conversion based on FPGA satisfy the performance requirements of standard short-wave radio and reduced hardware resource consumption.The design is characteristic of flexibility,universality and easy parameter modification.It works well in the standard short-wave radio application.

关 键 词：数字下变频 滤波器 现场可编程门阵列 

分 类 号：TN91[电子电信—通信与信息系统]