模拟电路自顶向下设计环境  

TOP DOWN DESIGN ENVIRONMENT FOR ANALOG CIRCUITS

作　　者：时龙兴[1] 陆生礼[1] 陈立[1] 

机构地区：[1]东南大学国家ASIC系统工程技术研究中心

出　　处：《计算机研究与发展》1997年第S1期222-226,共5页Journal of Computer Research and Development

摘　　要：基于行为模型描述的模拟电路自顶向下设计方法适应了当今电子系统的设计要求．文中介绍的设计环境采用分层次、参数化、开放式的模型库描述，实现了模拟电路的自顶向下设计．分析验证在频域内进行，并考虑了与数字系统信号描述、验证环境及数据交换之间的兼容．设计实例说明了设计环境的有效性．Top down design method for analog circuit based on behavioral modeling description is suitable for recent electronic system design. Hierarchical, parametric and open modeling description is used and top down design for analog circuits is realized by the design environment presented. The simulation and verification are completed in frequency domain. Signal description, verification environment and data exchange compatible with digital system are considered. The design example explains the efficiency of the design environment.

关 键 词：模拟电路 自顶向下 行为描述 时域 频域 

分 类 号：TP391.72[自动化与计算机技术—计算机应用技术]