Design and Test of Multibus Adapter System on a Chip for Fault Tolerant Computer Systems  

作　　者：Yang Yinghua, Huang Chang, Meng Biao, Zhang Xing, Yu Shan 

出　　处：《Journal of Systems Engineering and Electronics》1992年第4期5-6,2,共3页系统工程与电子技术（英文版）

摘　　要：In order to improve the system reliability and performance and to reduce the system cost, volume and weight, we have designed, fabricated and tested the multibus adapter system of a trimodular redundant fault tolerant computer system on a single chip of 5000 gate CMOS gate array. The design, fabrication and test of this single chip system will be discussed..In order to improve the system reliability and performance and to reduce the system cost, volume and weight, we have designed, fabricated and tested the multibus adapter system of a trimodular redundant fault tolerant computer system on a single chip of 5000 gate CMOS gate array. The design, fabrication and test of this single chip system will be discussed..

关 键 词：BUS Design and Test of Multibus Adapter System on a Chip for Fault Tolerant Computer Systems CHIP TEST 

分 类 号：N945[自然科学总论—系统科学] TN01[电子电信—物理电子学]