分支预测与值预测在VLIW处理器中的实现  

Realization of Branch Prediction and Value Prediction in VLIW

作　　者：李笑天[1] 郭德源[1] 何虎[1] 

机构地区：[1]清华大学微电子所,北京100084

出　　处：《微电子学与计算机》2015年第1期54-59,共6页Microelectronics & Computer

基　　金：核高基重大专项(2012ZX01034001-002)

摘　　要：为了降低超长指令字(VLIW)架构的平均跳转开销和平均访存时延,并减少VLIW程序的代码体积,提出了一种全新的将分支预测与值预测技术应用于VLIW架构的方法.首先分析现有超标量(Superscalar)架构中动态预测技术与VLIW架构中指令静态并行之间所存在的矛盾;通过拓展原有跳转指令和读内存指令,使之与不同的延时槽个数相对应,并根据不同的指令来阻塞流水线或延时写回寄存器,从而解决动态预测技术造成VLIW架构静态调度周期错乱的问题.基于Gem5仿真平台和清华大学Magnolia VLIW数字信号处理器(DSP)的基准测试程序实验表明,该分支预测与值预测技术能显著地提高VLIW架构的性能,缩小VLIW程序的代码体积.To reduce the average branch penalty,the average memory reference latency and the program code size in VLIW(Very Long Instruction Word)architecture,A new method to implement branch prediction and value prediction in VLIW is presented.Firstly,the confliction of the dynamic prediction in Superscalar and the static instruction parallelism in VLIW is analyzed.Then the branch and load instruction is expanded,one-to-one correspondence between the delay slot and the new expanded instructions.The pipeline is stalled and the write back stage is delayed according to the given instruction.Benchmark tests based on Gem5 and Magnolia VLIW DSP of Tsinghua University are presented to prove the advantage of the branch prediction and value prediction in VLIW.

关 键 词：超长指令字架构 分支预测 值预测 动态预测 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]