高速可重构抽取移位单元研究与设计  

Research and Design of High-speed Reconfigurable Extract-shift Unit

作　　者：常忠祥[1] 戴紫彬[1] 李伟[1] 龚海宁 

机构地区：[1]解放军信息工程大学 [2]61587部队

出　　处：《微电子学与计算机》2015年第4期21-24,30,共5页Microelectronics & Computer

摘　　要：为了提升密码算法中抽取、移位等位操作的处理效率,降低抽取和移位实现的硬件资源消耗,构建了以iButterfly网络为基础的高速可重构抽取移位硬件架构,提出架构所需的路由信息生成算法并进行高速硬件映射.最后对架构进行性能评估,结果表明,提出的抽取移位单元具有较高的处理效率和灵活性,在CMOS 65nm工艺下,32比特抽取移位工作频率可达到2GHz.In order to enhance processing efficiency and reduce hardware resource consumption of the extraction replacement and shift replacement in cipher algorithm,a high-speed reconfigurable extraction-shift hardware architecture based on iButterfly is constructed in this paper.At the same time,the generating routing information of framework are put forward,then mapping high-speed hardware is realized.Finally,the results show that the proposed extraction-shift units have high efficiency and flexibility.The number of 32-bit extraction-shift replacement operating frequency is 2GHz under the CMOS 65 nm.

关 键 词：iButterfly网络 路由算法 抽取移位 抽取 移位 

分 类 号：TN918.1[电子电信—通信与信息系统]