卡诺图在时序逻辑电路设计中的应用  

Application of Karnaugh Map in Design of Digital Electronics Technology

作　　者：何金保[1] 骆再飞[1] 诸葛霞[1] 

机构地区：[1]宁波工程学院,浙江宁波315016

出　　处：《宁波工程学院学报》2016年第2期1-4,共4页Journal of Ningbo University of Technology

基　　金：浙江省公益项目(2016C33G2290009);浙江省课堂创新项目(kg2015458);2016年宁波市教科规划课题(2016YGH015)

摘　　要：卡诺图是分析和设计数字电路的重要工具,本文首先阐述卡诺图模型建立方法,然后通过时序逻辑电路设计实例讨论卡诺图的应用方法,最后对卡诺图应用进行剖析。本文总结归纳了初学者理解上容易犯错的关键点,可使学生学习卡诺图时避开一些误区,从而熟练掌握和运用卡诺图工具。The Karnaugh map is an important tool for computing in the digital electronics technology. In this paper, the method of establishing Karnaugh map model is discussed, and then the application of Karnaugh map in the design of sequential logic circuit explored. Finally the applications of Karnaugh map are analyzed. Some error-prone knowledge points are proposed based on years of teaching experience to enable the beginners to avoid some misunderstandings in the Karnaugh map, so as to skillfully use the Karnaugh map.

关 键 词：卡诺图 数电 时序逻辑电路 

分 类 号：TN791[电子电信—电路与系统]