基于并联开关的低电压低功耗电流型CMOS电路设计  

Design of Low Voltage Low Power Current-Mode CMOS Circuits Based on Parallel Switches

作　　者：沈继忠[1] 邵志龙[1] 蒋征科[1] 

机构地区：[1]浙江大学信息与电子工程学系,杭州310028

出　　处：《电子与信息学报》2004年第8期1325-1331,共7页Journal of Electronics & Information Technology

摘　　要：该文提出了一种电流型CMOS电路的并联开关结构,使得电流型CMOS电路能在较低的电源电压下工作,因而可以实现电路的低功耗设计,同时在相同的电源电压下,采用并联开关结构的电路比相应的串联开关电路具有更快的速度.PSPICE模拟证明了采用并联开关结构设计的电路能在较低的电源电压下工作,并具有较小的电路延时.A novel current-mode CMOS parallel structure is proposed. This parallel switch structure allows current-mode CMOS circuits to perform under lower source voltage which makes low power consuming possible. Beside, the current-mode circuits based on the proposed parallel structure have smaller propagation delay time than its counterpart which use cascade switches under the same source voltage. PSPICE simulation proves that circuits designed with the proposed structure can perform under low source voltage while holding short propagation delay time.

关 键 词：电流型CMOS电路 阈运算 并联开关 多值逻辑 

分 类 号：TN432[电子电信—微电子学与固体电子学]