高性能数字信号处理器的设计  

High Performance Digit Signal Processor Design

作　　者：严伟[1] 龚幼民[1] 

机构地区：[1]上海大学微电子中心上海大学机电与自动化学院,上海201105

出　　处：《微处理机》2004年第4期10-15,共6页Microprocessors

摘　　要：本文完成了 1 6位的数字信号处理器的设计 ,该数字信号处理器设计了针对信号处理的指令与体系结构 ,指令数为 88条 ,综合后数字信号处理器的内核单元数为 1 2 799。十六位定点数字信号处理器为单发射系统 ,采用了多数据和地址总线设计 ,使四级流水在流水线的四个周期保持正常的数据流动 ,分散的寄存器形式结构 ,使多数指令在一周期内得到完成。数字信号处理器包含了中央算术逻辑单元、乘法器单元、移位器单元、排序器单元、辅助寄存器单元、中断单元的设计。在中央算术逻辑单元中 ,完成加 /减运算以及逻辑运算 ,在进位链中采用了选择进位链 ,对数据溢出采用了饱和处理的方法 ;在乘法器单元中采用 BOOTH算法和先进进位加法器相结合的单元设计 ;在排序器设计中 ,按照中断、指令第二指令字、累加器、堆栈等不同的程序排序源设计不同的通路 ,并按照 ZLVC的条件 ,设计了条件转移指令 ;在辅助寄存器单元选择一条与正向进位相反方向的进位来实现 FFT算法位反序要求 ;在中断单元中 ,采用二级中断 ,大堆栈保存地址 ,流水“冲刷”技术。The design of 16 bits digit signal processor is Completed.The instructions and architectural structure of digit signal processor design is aimed at treatment of signal processor,The instructions are 88,the cell figure of the core of digit signal processor is 12799 after synthesis.The 16 bits fixed-point DSP system is the single emission,multi-address /data bus maintaining data flowing in four cycles of pipeline from place to place,Decentralized register composition,most instructions finishing in one cycle.The digit signal processor embodies the center arithmetic logic unit,Multiplier unit,Shifter unit,Sequencing unit,Auxiliary register unit,interception unit.The center arithmetic logic unit is carrying out plus/sub calculation and logic operation,The carry being the selection carry link,adopting the saturated handle to cope with the data spills;The multiplier unit adopts the BOOTH algorithm and carry lookahead adder;In accordance with Difference sequencing source such as interceptions,second word of the instruction,Accumulator,stack,the sequencing unit designs different path.Moreover,in term of ZLVC register,Designs the conditional branch instruction;The Auxiliary register unit chooses one carry with contrary to orientation carry to achieve the FFT algorithm demand;The interception unit,Adopts two steps of interceptions,great stack conserved the address,“scour”Technique in pipeline.

关 键 词：数字信号处理器 中断 流水线 中央算术逻辑单元 

分 类 号：TP368[自动化与计算机技术—计算机系统结构]