嵌入式系统软硬件协同模拟验证环境设计与实现  

Design and Implementation of Embedded System Co-verification Environment Based on Simulation

作　　者：严迎建[1,2] 王世好[1] 刘明业[1] 

机构地区：[1]北京理工大学ASIC研究所 [2]军信息工程大学电子技术学院,郑州450004

出　　处：《计算机工程》2004年第9期45-47,共3页Computer Engineering

基　　金：国防基础科研基金资助项目;用微电子资助项目

摘　　要：介绍了一个嵌入式系统软硬件协同模拟验证环境，该环境以指令集模拟器和事件驱动硬件模拟器为基本框架，并由总线调度模型和总线界面模型提供软硬件模拟交互界面。重点讨论该环境中软硬件模拟器之间的接口设计与实现方法，最后给出一个嵌入式系统协同验证的应用实例。Co-verification plays very important role in hardware/software Co-design of embedded systems. It can validate function of the whole embedded system and predicate system performance before the hardware model is built. This paper presents a hardware/software simulation environment for embedded system co-verification, it combines an event-driven hardware simulator with an instruction set simulator. It discusses the co-simulation interface of the two simulators in detail, and in the end, we present an embedded system co-verification example.

关 键 词：嵌入式系统 协同验证 软硬件协同模拟 指令集模拟器 

分 类 号：TP337[自动化与计算机技术—计算机系统结构]