超低压差CMOS线性稳压器的设计  

Design of a Ultra Low-Dropout CMOS Voltage Regulator

作　　者：代国定[1] 庄奕琪[1] 刘锋[1] 

机构地区：[1]西安电子科技大学微电子研究所,西安710071

出　　处：《电子器件》2004年第2期250-253,共4页Chinese Journal of Electron Devices

摘　　要：设计出一种输出电流为 30 0mA且具有微功耗超低压差低噪声性能的单片CMOS线性稳压器 ,对其电路结构及工作原理进行了分析并给出各子电路模块的设计。该稳压器具有过流过热保护 ,工作电压范围为 2 5V～ 6V。基于现代公司的 0 6 μmCMOS工艺模型 ,Hspice模拟结果表明其输入输出压差的典型值分别为 0 4mV @1mA和12 0mV @30 0mA ,静态电流的典型值为 90 μA。A design of micropower, ultra low-dropout, low-noise, 300 mA output current, CMOS voltage Regulator is presented. The structure and principles were analyzed and sub-circuits were given. The regulator was operable at input voltages2.5 V-6 V, with function of preventing temperature from over-raising, current from over-ranging.Based on the Hynix’s 0.6μm CMOS process parameters, the Hspice simulation results show that the typical dropout is 0.4 mV @ 1 mA and 120 mV @ 300 mA respectively, and the typical quiescent current is 90 μA.

关 键 词：超低压差 线性调整 负载调整 稳压器 

分 类 号：TN43[电子电信—微电子学与固体电子学]