大规模集成电路模拟技术中改进型支路撕裂法  

Modified Branch Tearing Method for the Analysis of Very Large Scale Integrated Circuit

作　　者：赵进全[1] 路灿[1] 韩玉兰[1] 江慰德[1] 

机构地区：[1]西安交通大学电气工程学院,西安710049

出　　处：《西安交通大学学报》2004年第8期828-830,共3页Journal of Xi'an Jiaotong University

基　　金：国家自然科学基金资助项目(591 772 84)

摘　　要：提出了一种改进型的支路撕裂法,该方法将撕裂支路等效为受一定条件约束的电流源支路,引入松弛法和迭代法,从而将整个电路转变为若干个相对独立的子电路.该方法不需要对电路中的节点、支路按特殊规则进行划分,能够有效地分析含有纯电压源支路的电路及非线性电路,对迭代初始值要求低,收敛快,方法简单.计算实例验证了该方法的可靠性和有效性.In the analysis of very large scale integrated circuit (VLSI), the branch tearing method, which is initiated from the node voltage method, is difficult to analyze the nonlinear circuits and the circuits with branches of voltage sources, so a modified branch tearing method is presented, where iteration and relaxation technology are adopted, the tearing branches is considered as the branches of current sources which are restricted by specific conditions, and the VLSI is divided into some relatively independent subcircuits. And the circuit response can be obtained as the response of each subcircuit. It is unnecessary for the nodes and branches of the circuit to be arrayed with the specific regulation, and the initial data of the iteration affect the method slightly, thus the nonlinear circuits and the circuits with branches of voltage sources can be analyzed effectively. An example is given to confirm its simplicity, validity and reliability.

关 键 词：大规模集成电路 改进型支路撕裂法 非线性电路 电压源支路 

分 类 号：TN321[电子电信—物理电子学] TN710