采用自举技术的不完全绝热电路  

Bootstrapped partially-adiabatic circuits

作　　者：杨骞[1] 周润德[1] 

机构地区：[1]清华大学微电子学研究所,北京100084

出　　处：《清华大学学报（自然科学版）》2004年第7期981-983,共3页Journal of Tsinghua University(Science and Technology)

基　　金：国家自然科学基金资助项目(59995550-1);国家教育振兴计划项目

摘　　要：为了大规模集成电路的低能耗应用,提出了一种不完全绝热电路——自举能量回收逻辑电路(bootstrapenergyrecoverylogic,BERL)。该电路采用二相无交叠功率时钟。由于采用自举技术,使负载的冲放电过程不会产生非绝热损失,并且输出开关的导通电阻变小,使绝热损失降低。为了比较BERL电路与静态CMOS电路及PAL-2n绝热电路的能耗,设计了反相器链电路。Hspice软件仿真结果表明,BERL电路的工作频率可以超过400MHz。在10～100MHz下,BERL能耗只有静态CMOS电路的25%～33%。相对于PAL-2n电路,BERL也有较低的能耗。在200MHz下,BERL能耗只有PAL-2n的50%。负载越重,BERL电路的低能耗优势越明显。A partially-adiabatic circuit, the bootstrap energy recovery logic (BERL), was developed to reduce energy losses in low power applications in large-scale integrated circuit. The BERL circuit uses a two-phase, non-overlapped power clock. With the bootstrap technique, the circuit has no non-adiabatic losses during the energy transfer of the output load. In addition, the turn-on resistance of the switch is reduced, which reduces the adiabatic losses. An inverter chain was designed to compare the energy losses of BERL, static CMOS (complementary metal-oxide semiconductor), and PAL-2n (pass-transistor adiabatic logic). Hspice programme simulations showed that the BERL circuit operates even at frequencies over 400 MHz. At 10～100 MHz, BERL dissipates only 25% to 33% of the energy dissipated by a static CMOS. At 200 MHz, BERL dissipates only 50% of the energy dissipated by PAL-2n. The energy performance of the BERL circuit is more excellent with larger load.

关 键 词：大规模集成电路 绝热电路 自举技术 能量回收 低功耗 

分 类 号：TN47[电子电信—微电子学与固体电子学]