MPEG-4中运动估值的低功耗VLSI设计  

A Low-power VLSI Implementation of a Motion Estimation Block in MPEG-4

作　　者：刘丽蓓[1] 王颀[1] 徐锋[1] 张胜媛[1] 李晴[1] 邵丙铣[1] 

机构地区：[1]复旦大学国家微电子材料与元器件微分析中心,上海200433

出　　处：《固体电子学研究与进展》2004年第3期331-336,共6页Research & Progress of SSE

摘　　要：提出了一种适用于 MPEG-4标准的运动估值模块的低功耗 VLSI设计 ,它可以有效地支持包括全搜索块匹配算法及快速算法在内的四种 ME算法。通过考虑合理的数据流映射来减小访存带宽 ,处理单元内部进行比较以提早结束计算 ,以及用低功耗全加单元优化关键模块 ,在系统级、结构级和电路级实现低功耗性能 ,并给出了仿真结果。This paper presents a low-power VLSI implementation of a motion estimation block applying for MPEG-4 standard. Various ME algorithms including FSBMA and some fast algorithms are supported with high efficiency in this block. By mapping rational data sequence to architecture for low memory bandwidth, comparing in PE to terminate calculation early, and designing a low-power full-adder circuit, the performance of low-power is implemented in system, architecture and circuit level. The simulation results are also presented.

关 键 词：运动估值 低功耗 MPEG-4 全搜索块匹配 

分 类 号：TN47[电子电信—微电子学与固体电子学]