IA-64中软件数据预取的优化  

Optimization of software data prefetching in the IA-64 architecture

作　　者：李文龙[1] 林隽民[1] 汤志忠[1] 

机构地区：[1]清华大学计算机科学与技术系,北京100084

出　　处：《清华大学学报（自然科学版）》2004年第9期1282-1285,共4页Journal of Tsinghua University(Science and Technology)

基　　金：国家自然科学基金资助项目 ( 60 173 0 10 ) ;国家"八六三"高技术项目 ( 2 0 0 1AA1110 60 )

摘　　要：软件数据预取是一种有效的隐藏存储延迟的技术。IA- 6 4是支持软件数据预取和软件流水的 EPIC(显式并行指令计算 )体系结构。软件数据预取不是一种无损的技术 ,其引入的开销有时会降低程序的性能。提出了降低软件流水中数据预取开销的算法 ,利用旋转寄存器的特性合并具有相同类型的预取操作。在 ORC(open research compiler)中实现了此算法 ,并对 SPEC CFP2 0 0 0基准程序进行了测试。实验结果表明此算法有效减少了冗余数据操作的个数 。Software data prefetching is an effective technique for hiding memory latency. IA-64 is a new EPIC (explicit parallel instruction computing) architecture that provides hardware support for software data prefetching and software pipelining; however, the overhead introduced by the software data prefetching may sometimes result in performance degradation. An algorithm called merging prefetch using the rotating register (MPURR), which exploits the availability of rotating register in the IA-64 architecture, was developed to minimize redundant prefetches. The algorithm is implemented in the open research compiler (ORC) and tested using several SPEC CFP2000 benchmarks. The test results show that algorithm effectively improves program performance and reduces the software data prefetching overhead.

关 键 词：软件数据预取 软件流水 旋转寄存器 

分 类 号：TP311[自动化与计算机技术—计算机软件与理论]