一种可参数化快速FNT的FPGA实现  

A Parameterized FPGA Realization of High-Speed FNT Processor

作　　者：陶涛[1] 初建朋[1] 赖宗声[1] 韩芳[1] 李新兵[1] 李成诗[1] 徐晨 景为平 

机构地区：[1]华东师范大学微电子电路与系统研究所,上海200062 [2]江苏省专用集成电路设计重点实验室,南通226007

出　　处：《微电子学与计算机》2004年第10期165-168,共4页Microelectronics & Computer

基　　金：上海市科委PDC项目(027062012);江苏省专用IC设计重点实验室资助(KJS03056)

摘　　要：讨论了一种基于FPGA的快速FNT算法的实现方案,同时对FNT算法的应用进行了初步的探讨。设计采用与FFT算法中类似的基4时序抽取方法,采用双端口内置RAM及数据串入串出的流水线工作方式。本设计可通过调配参数实现64点及256点的FNT变换,并可同时并行完成两组FNT变换。已经成功应用于数字签名算法中GF(p)域多项式模乘的实现,并使用Xilinx公司Virtex2系列xc2v1000器件下载验证通过了64点的FNT变换。This paper presents a FPGA realization based high-speed FNT processor and some primitive discussion is given about the application of FNT algorithm. This design is based on decimation-in-time 4-based algorithm, as well as that in FFT algorithm, using dual ports imbedded block ram and pipeline structure. This design can calculate FNT of 64 points and 256 points by changing the parameters and can complete two groups of parallel calculation at one time. The design succeeds in the application to the multiplication of polynomials on GF(p) in digital signature algorithm and it is has been implemented in xc2v1000 device of XilinxVirtex2 series.

关 键 词：Fermat数变换 快速傅立叶变换 现场可编程门阵列 

分 类 号：TN911.7[电子电信—通信与信息系统]