USB2.0中CRC码的并行算法及硬件实现  

The Cyclic Redundancy Check Parallel Algorithm and Hardware Realization in Universal Serial Bus

作　　者：陈静瑾[1] 邓雅诺[1] 马文龙[1] 余宁梅[1] 

机构地区：[1]西安理工大学自动化与信息工程学院,陕西西安710048

出　　处：《西安理工大学学报》2004年第3期272-275,共4页Journal of Xi'an University of Technology

摘　　要：基于CRC检错原理,针对USB2.0协议规定的要求,研究了一种通用的CRC16并行算法及硬件实现。该方法适用于不同的CRC生成多项式和不同的并行度,尤其对并行度大于8位的高速系统的CRC计算。与常用的串行算法及查表法相比,该方法使电路的硬件实现比较容易,提高了电路对数据的处理能力,减小了时延,具有现实性及优越性。Based on the principle of Cyclic Redundancy Check (CRC) and the requirement of Universal Serial Bus(USB) 2.0, a general parallel algorithm and hardware realization is studied in this paper.This method is suitable for any generator polynomial and parallel degree particularly for high speed system CRC algorithm with 8 bits.Compared with serial algorithm this method is of actuality and advantage to make electril ciruit easier for the hardware realization,the improvement of data processing ability and the reduction of time delay.

关 键 词：CRC(循环冗余校验码) USB(通用串行总线) CRC并行算法 

分 类 号：TP302.7[自动化与计算机技术—计算机系统结构]