一种新的MPEG-2运动补偿VLSI结构  

A Novel VLSI Architecture for MPEG-2 Motion Compensation

作　　者：赵存刚[1] 陈光化[1] 邹国良[1] 赵波[1] 舒海军[1] 

机构地区：[1]上海大学微电子研究与开发中心,上海200072

出　　处：《上海大学学报（自然科学版）》2004年第6期555-558,共4页Journal of Shanghai University:Natural Science Edition

基　　金：上海市教委发展基金资助项目 (2 0 2 2 78)

摘　　要：在MPEG 2MP@HL(MainProfileatHighLevel)运动补偿的硬件实现中,需要运算的图像数据量非常大,该文采用双口RAM作为运动补偿的缓存器、流水线预测结构的方案,很好地解决了数据吞吐量大的问题.文中的方案通过FPGA(FieldProgrammableGateArray)验证,给出了相关结果并与参考文献进行了比较.仿真结果表明该文的方案能满足MPEG 2MP@HL的实时解码要求,并用EDA软件进行ASIC设计.A new scheme for MPEG-2 motion compensation is presented for MPEG-2's main-profile-at-high-level (MP@HL) decoding. A dual-port RAM is used as a buffer and a pipeline VLSI structure for motion prediction to deal with the problem of heavy data throughput. The proposed method has been verified with an FPGA implementation. Simulation results are compared with those presented in the literature, indicating that the described scheme can meet the requirements of MPEG-2 MP@HL decoding. Finally an ASIC design is completed with an EDA software tool.

关 键 词：双口RAM 流水线 运动补偿 MPEG-2MP@HL 

分 类 号：TN919.8[电子电信—通信与信息系统]