一种基于多输入单电子晶体管的比较器电路  

A Comparator Based on Multigate Single-Electron Transistor

作　　者：刘河潮[1] 蔡理[1] 王森[1] 

机构地区：[1]空军工程大学工程学院,陕西西安710038

出　　处：《微电子学》2005年第1期59-62,共4页Microelectronics

基　　金：陕西省自然科学基金项目(2002F34)空军工程大学学术基金项目(2002X12)

摘　　要：基于多输入单电子晶体管(SET)的I-V特性和CMOS数字电路的设计思想,提出了一 种由18个互补型SET和1个双栅极SET构成的1位比较器电路结构。该比较器优点为:利用一个双 栅极SET的固有特性,使异或逻辑块得到了简化,减少了晶体管的数目;电压兼容性好,输入和输 出高低电平都接近0.02 V和0 V;静态总功耗低(6.42 pW)。仿真结果验证了电路的正确性。Based on the I-V characteristics of multigate single-electron transistor (SET) and the concept of CMOS digital integrated circuit design, a comparator consisting of 18 complementary SET's and 1 double-gate single-electron transistor is proposed. In the comparator, the XOR logic block is simplified and the number of transistors is reduced due to the excellent characteristics of the single-electron transistor, and excellent voltage compatibility is achieved with both input/output high- and low-voltage approximating 0. 02 V and 0 V. The total static power of the circuit is down to 6. 42 pW. The accuracy of the device is validated by SPICE macro-model of SET.

关 键 词：单电子晶体管 双栅极SET 比较器 SPICE 宏模型 

分 类 号：TN791[电子电信—电路与系统] TN32