基于时间约束的FPGA数字水印  

FPGA Watermarking Based on Modification of Time Constraints

作　　者：陆健峰[1] 王朔中[1] 

机构地区：[1]上海大学通信与信息工程学院,上海200072

出　　处：《电子与信息学报》2004年第12期1882-1887,共6页Journal of Electronics & Information Technology

基　　金：上海市重点学科建设项目(2001-44)资助课题

摘　　要：该文提出一种基于时间约束的FPGA数字水印技术,其基本思想是将准备好的水印标记嵌入非关键路径上的时间约束来定制最终的下载比特流文件,同时并不改变设计的原始性能.这一方法能保证水印标记所对应的下载比特流文件的唯一性,从而可对FPGA设计模块的所有权提供强有力的证明。与其他方法相比,该文提出的技术不仅具有零空间开销和低时间开销,而且还有效地提高了信息嵌入量。Based on modification of time constraints in the FPGA design, a watermark-embedding scheme is proposed for protection of intellectual property rights of the system designer. A coded binary watermark sequence is used to replace the least significant digits of the time constraints in some non-critical paths. The modified time constraints lead to substantial and unique changes in the generated bit stream without altering the performance of the design, both in terms of space and time overheads and the system functionality. The embedded data can be extracted in a reverse procedure. The paper provides a scheme with zero area and low timing overheads, and a significant increase in embedding capacity in comparison with some existing techniques.

关 键 词：知识产权 数字水印 现场可编程门阵列 时间约束 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]