二进制翻译中的标志位优化技术  

Two Condition Code Optimization Approaches in Binary Translation

作　　者：马湘宁[1] 武成岗[1] 唐锋[1] 冯晓兵[1] 张兆庆[1] 

机构地区：[1]中国科学院计算技术研究所,北京100080

出　　处：《计算机研究与发展》2005年第2期329-337,共9页Journal of Computer Research and Development

基　　金：国家自然科学基金项目 (60 10 3 0 0 6);国家"八六三"高技术研究发展计划基金项目 (2 0 0 1AA1110 61)

摘　　要：在二进制翻译技术中 ,如何有效降低对源指令集体系结构标志位的模拟开销是一个值得研究的课题 分别针对二进制翻译中的解释执行和动态翻译 ,提出了相应的标志位模拟优化算法 ,能够有效地减少翻译生成的目标代码数量 ,提高目标代码性能 经过大量测试验证 ,在应用该标志位模拟优化算法后 ,DigitalBridge系统翻译生成的目标代码量是源体系结构目标代码量的 12 0 % ,而没有应用该优化算法时该比例是 2 5 0 % ,作为对比系统UQDBT系统的比例是 15 0 %It is an important performance issue how to reduce the emulation cost of the source Instruction Set Architecture's condition codes. In this paper, two optimized emulating algorithms for emulator and dynamic translator are presented, which can effectively improve the performance of the translated code. In emulator, ICDC(instant computing and delayed computing) algorithm compared with delay computing algorithm, can reduce the memory access overhead of object code. In dynamic translator, DFADC(data flow analysis and delayed computing) algorithm is presented to reduce redundant flag computing code. Data flow analysis is used in basic block, and delayed computing is used inter basic block. The two new optimized emulating algorithms can be applied in all the translation from source ISA with flag mechanism to target ISA without such mechanism. These algorithms are verified in the binary translator system——Digital Bridge, which combines emulation and dynamic translation methods. With these algorithms, Digital Bridge can do binary translation in 120% code size of the original binary code, while it could be 250% code size for non-optimized algorithms and 150% code size for UQDBT system. These data indicate that the algorithms are effective to reduce redundant code and to improve the performance of translated code.

关 键 词：二进制翻译 标志位优化 延迟计算 即时计算 

分 类 号：TP314[自动化与计算机技术—计算机软件与理论]