CuO掺杂对SnO_2压敏材料性能的影响  

Effect of doping CuO on the electrical properties of (Ni, Ta)-doped SnO_2 varistors material

作　　者：明保全[1] 王矜奉[1] 陈洪存[1] 苏文斌[1] 臧国忠[1] 高建鲁 

机构地区：[1]山东大学物理与微电子学院,山东济南250100 [2]济南安太电子研究所,山东济南250010

出　　处：《功能材料与器件学报》2005年第1期33-37,共5页Journal of Functional Materials and Devices

基　　金：山东省自然科学基金资助项目Z2003F04

摘　　要：研究了掺杂CuO对SnO2·Ni2O3·Ta2O5压敏材料电学性能的影响。实验发现,随着CuO的掺杂量从0.50mol%增加到1.50mol%,材料的压敏电场强度从132V/mm升高到234V/mm,相对介电常数从4663减小到2701。电场强度变化的原因是CuO掺杂引起的晶粒尺寸变化,随掺杂量增加晶粒尺寸从18.8μm减小到13.3μm。未固溶于SnO2晶格而偏析在晶界上的CuO阻碍了相邻SnO2晶粒的融合,这导致了晶粒尺寸的减小。为了解释SnO2·Ni2O3·Ta2O5·CuO电学非线性性质的起源,本研究对前人的晶界缺陷势垒模型进行了修正。对该压敏材料进行了等效电路分析,实验测量与等效电路分析结果相符。CuO effects on the electrical properties of (Ni,Ta)-doped SnO2 varistor material were investigated. When CuO concentration increases from 0.50 mol% to 1.5 mol%, the varistor field increases significantly from 132 V/mm to 234 V/mm, the relative dielectric constants decreases greatly from 4663 to 2701. With CuO concentration increases from 0.50 mol% to 1.5 mol%, the SnO2 grain size decreases significantly from 18.8 μm to 13.3 μm, which heightens the varistor fields. The reduction of the grain size attributes to the CuO segregation at grain boundaries hindering the SnO2 grains from merging each other to grow larger. The grain-boundary defect barrier model was modified to illustrate the nature of the electrical nonlinearity for the material. And an analysis of an equivalent circuit was conducted. The experimental result has a good coincidence with which derived by equivalent circuit.

关 键 词：压敏材料 SNO2 电学性能 晶粒尺寸 缺陷势垒模型 

分 类 号：TN379[电子电信—物理电子学]