基于FPGA的动态分布式算法的研究与应用  

Research and Application of a Dynamic Distributed Arithmetic Based on FPGA

作　　者：任维政[1] 陈凌霄[1] 梁菁[1] 

机构地区：[1]北京邮电大学电子工程学院,北京100876

出　　处：《电子器件》2005年第1期211-213,217,共4页Chinese Journal of Electron Devices

摘　　要：为了提高FPGA对乘积和运算的处理速度和灵活性,在分布式运算法的基础上,采用动态查询表代替ROM,提出了一种占用硬件资源少、运算速度快、系数可在线编程的动态分布式乘积和运算算法。该算法不仅摆脱了固定数据总线宽度和运算顺序执行对数字信号处理速度的限制,同时为实现系数可编程FIR滤波器提供了有效的解决方案。In order improve operating speed and flexibility of sum of products on FPGA, a Dynamic Distributed Arithmetic (DDA), with Look-Up Dynamic Table instead of ROM, is put forward based on the theory of Signed Distributed Arithmetic. DDA occupies a few hardware resources, operates sum of products quickly and realizes coefficient programmable. Not only is DDA's operating speed free from fixed data bus width and sequential operation, but also provides an effective method to realize coefficient programmable FIR filter.

关 键 词：FPGA 动态分布式算法 FIR 

分 类 号：TN273.5[电子电信—物理电子学]