射频锁相频率合成器的设计与实现  

Design and Implementation of RF PLL Frequency Synthesizer

作　　者：陶冶[1] 应鲁曲[2] 高凤辉 

机构地区：[1]解放军理工大学通信工程学院研究生 2队 [2]解放军理工大学通信工程学院无线通信系 [3]北京61276部队

出　　处：《军事通信技术》2005年第1期21-25,31,共6页Journal of Military Communications Technology

摘　　要：文中介绍了电荷泵锁相频率合成器的系统组成及工作原理,分析了电荷泵锁相环的结构及环路滤波器的常用电路形式,讨论了吞脉冲程序分频的工作过程及特点,设计并制作完成了以LMX2370芯片为核心、频率步进为1MHz、输出频率分别为950MHz～1100MHz和1850MHz～2400MHz的双路宽频带频率合成器。该频率合成器具有体积小、功耗低、频带宽、相噪低、控制灵活方便等特点。This paper introduced the system composition and basic principle of charge pump PLL frequency synthesizer, analysed the structure of charge pump PLL and loop filter, discussed the working process and characteristic of pulse swallow frequency divider, and designed and implemented a wide band dual RF PLL frequency synthesizer with 1 MHz frequency step and 950 MHz～1100 MHz and 1850 MHz～2400 MHz frequency output range using LMX2370. The PLL frequency synthesizer has the characteristic of small volume, low power consumption, wide band, and low phase noise, and it is flexible and reliable to be controlled.

关 键 词：频率合成器 鉴相/鉴频器 电荷泵 环路滤波器 

分 类 号：TN74[电子电信—电路与系统]