一种基于CPLD的SPWM控制波形生成方法  

CPLD-based method for producing SPWM control waveforms

作　　者：梁中华[1] 肖丹[1] 杨霞[1] 

机构地区：[1]沈阳工业大学电气工程学院,沈阳110023

出　　处：《沈阳工业大学学报》2005年第2期187-191,204,共6页Journal of Shenyang University of Technology

摘　　要：研究使用Altera公司的MAX+PLUSII10 0开发软件,采用硬件描述语言(HDL)与原理图输入相结合的自顶向下的层次化设计方法,开发ACEX1K系列CPLD器件,在线生成用于闭环变频调速的双极性SPWM波形.根据给定的电压幅值和频率,通过地址转换、查表、抬高幅值和极性处理实时获取三相正弦调制波数字量,并与生成的数字锯齿波进行比较,由两者的交点来确定逆变器开关时刻,其中调制度、载波频率和载波比可变,以实现基频以下恒压频比、基频以上恒压升频控制方式和分段同步调制的闭环SPWM变频调速.The paper develops the CPLD device of ACEX 1K series and makes use of Altera's MAX+PLUS II 10.0 software to generate bipolar SPWM waveform signals online for variable frequency loop (systems) by the top-down design method. The mixture input of HDL and schematics is employed.According to the given amplitudes of output voltage and frequency,the digital values of three-phase sine modulating (signals) are obtained through address conversion,table look-up,amplitude scale-up and polarity process.The three digital values are respectively compared with the current value of digital sawtooth wave.The switch points are located at the intersection of the two waves.Furthermore,the modulation degree,carrier (frequency) and carrier ratio are variable so that the variable-frequency loop SPWM speed (control,)maintaining the constant volts/herts ratio below the base frequency or keeping the output voltage constant but frequency (increasing) above the base frequency and piecewise synchronous modulation,can be implemented.

关 键 词：硬件描述语言 复杂可编程逻辑器件 恒压频比 正弦脉宽调制 变频调速 

分 类 号：TP276[自动化与计算机技术—检测技术与自动化装置]