基于CMOS图像传感器中DPGA的电容阵列优化研究  

Study on Optimization of Capacitor Segment of DPGA Based on CMOS Image Sensor

作　　者：戴山小[1] 姚素英[1] 赵毅强[1] 张为[1] 李树荣[1] 张生才[1] 徐江涛[1] 

机构地区：[1]天津大学电子信息工程学院ASIC设计中心,天津300072

出　　处：《传感技术学报》2005年第2期377-380,共4页Chinese Journal of Sensors and Actuators

基　　金：天津市重大科技攻关计划项目(033183911)

摘　　要：结合用于CMOS图像传感器中的低噪声DPGA的性能特点,提出了一种优化电容阵列拓扑结构的方法,讨论了此种结构下由寄生电容引入的时钟馈通和电荷分配效应,并给出了仿真结果和按照0.35μmCMOS工艺进行流片的版图。测试结果表明,采用改进的电容阵列结构能把采样电容引入的噪声斜率从原来的0.15降低到0.01。This paper is based on the high performance characteristic of the low noise digital programmable gain amplifier(DPGA) usually used in the CMOS image sensor . The proposed method to optimize the capacitor segment and reduce the noise induced by the parasitic capacitor has been discussed. We also presented the simulation result and the layout designed using 0.35 μm CMOS technology. The simulation result indicated that the noise slope reduced from 0.15 to 0.01.

关 键 词：CMOS 图像传感器 DPGA 电容优化 

分 类 号：TP212[自动化与计算机技术—检测技术与自动化装置]