同步时序电路的增广Petri网分析  

ANALYSIS OF SYNCHRONOUS SEQUENTIAL CIRCUITS BASED ON EXTENDED PETRI NET

作　　者：司玉娟[1] 王万树[1] 郭殿龙 戴逸松[1] 

机构地区：[1]吉林工业大学电子工程系,长春130025

出　　处：《电子科学学刊》1995年第5期529-534,共6页

基　　金：国家自然科学基金

摘　　要：本文应用带抑制弧的增广Petri网建立了基本门电路和常用触发器的Petri网模型;并运用该模型描述了同步时序电路;提出了增广Petri网的授权矩阵、状态转移方程和触发器次态与变迁授权条件的关系。在此基础上可对同步时序电路描述和分析,并用实例证明了该方法的有效性。The models of the basic gates and typical flip-flops for Petri net are constructed by using a kind of extended Petri net with inhibitor arc. Then the syncronous sequential circuit are described. The enabled matrixes, the state equations and the relation between the next state of flip-flop and the enabled transition are given. Based on these, the analysis method of Petri net for synchronous sequential circuits is discussed. It is proved that the theory is effective by practical examples.

关 键 词：时序电路 增广PETRI网 逻辑分析 

分 类 号：TN711.1[电子电信—电路与系统]