多通道LVDS的实现及传输错误处理  

Multi-Channel LVDS and Transmission Error Handling

作　　者：李向阳[1] 

机构地区：[1]中国科学院声学研究所数字系统集成部,北京100080

出　　处：《小型微型计算机系统》2005年第8期1436-1440,共5页Journal of Chinese Computer Systems

基　　金：国家重点基础研究发展规划项目(G1999032906)资助.

摘　　要：低电压差分信号LVDS是下一代通讯协议采用的数据传输形式.结合并行RapidIO协议的实现给出了用CPLD器件及VHDL语言实现多通道LVDS的方法;详细讨论了多数据通道高速数据传输时由于时钟-数据错位和数据线间延迟差异引起的传输错误;对这种传输错误处理有几种解决方案,论文采用4位通道对齐器消除4位以内的传输错误,给出了通道对齐器的实现方法及仿真波形;在RapidIO协议验证板上验证了多通道LVDS数据传输的实现方法,并通过实验测得8位并行LVDS的数据传输率可达300MB/秒,实验表明多通道LVDS实现简单,抗干扰能力强.ow voltage differential signal, or LVDS, is adopted by the next-generation communication protocol, such as RapidlO interconnect. In this paper, the method to implement the multi-channel LVDS using CPLD device and VHDL language is presented first. All sorts of transmission error, which are generated during the process of high-speed data transportation due to clock-data skew and difference between transmission lines, are also discussed in detail. A logical component, 4-bit-channel aligner is devised and simulated to solve this sort of transmission error. Finally an evaluation board of RapidIO are devised, on which multi-channel LVDS is implemented. The transmission ratio of 8-bit parallel LVDS on this hoard is up to 300MBps.Many experiments demonstrate that multi-channel LVDS has perfect character of high transportation ratio, easy implementation, and high EMIF.

关 键 词：低电压差分信号 RAPIDIO 时钟-数据错位 通道对齐器. 

分 类 号：TP331[自动化与计算机技术—计算机系统结构]