一种微控制器总线结构的设计  

Design of a Kind of MCU Bus Architecture

作　　者：郭腊梅[1] 胡越黎[1] 

机构地区：[1]上海大学微电子研究与开发中心,上海200072

出　　处：《计算机测量与控制》2005年第7期715-717,共3页Computer Measurement &Control

基　　金：上海市教委自然科学基金资助项目(03AK16)

摘　　要：设计了一种适用于嵌入式微控制器系统的总线结构,并着重于从速度方面加以考虑,采用以下方案进行设计:(1)内部ALU的设计采用三总线结构;(2)内部系统总线采用并行单总线结构;(3)外部总线采用二总线结构;并对各总线结构给出了工作时序,对如何提高系统的工作速度也进行了探讨;经验证该总线是一种并行、同步的快速总线;采用该总线结构的高性能MCU内核,工作速度明显提高,系统工作稳定,能够满足嵌入式系统的需要。A kind of bus architecture which fits in with embedded MCU system is designed, The system work speed is considered mainly using methods as follows： （1） Three-bus architecture is adopted in the ALU design. （2） Parallel single-bus architecture is adopted in internal system bus design. （3） Double- bus architecture is adopted in external bus architecture design. Working timing of the bus architecture is given respectively. Furthermore, how to improve the system working speed is discussed, It has proved that this is a kind of parallel, synchronized and high-speed bus architecture. The working speed of the high-performance MCU IP core which uses this bus architecture is enhanced remarkably. Moreover, the system working is stable and meets the requirement of the embedded system.

关 键 词：微控制器 总线结构 总线时序 

分 类 号：TP336[自动化与计算机技术—计算机系统结构]