基于FPGA的PCI总线仲裁器设计  

Design of PCI Bus Arbitration Device Based on FPGA

作　　者：聂鑫[1] 田建生[1] 梁远灯[1] 

机构地区：[1]武汉大学电子信息学院,湖北武汉430079

出　　处：《计算机测量与控制》2005年第8期817-820,共4页Computer Measurement &Control

基　　金：国家"十五"计划资助项目(2001AA631050)。

摘　　要：利用现场可编程门阵列(FPGA)设计PCI总线仲裁器,以适应各种不同要求的应用场合。遵循总线仲裁循环优先级算法原则,选用分布式仲裁结构,利用VHDL语言将PCI总线、总线仲裁器和功能模块进行联合优化设计,实现基于FPGA的PCI总线仲裁器。To meet various situation the bus arbitration device is designed using FPGA. Followed the principle of Bus arbitration Circulation preference Arithmetic, selected the configuration of distributing arbitration is selected. By using VHDL language, PCI bus, bus arbitration Device and the module of function are designed with the method of coalesce optimization, PCI Bus Arbitration Device is realized based on FPGA.

关 键 词：PCI总线 仲裁算法 仲裁结构 VPGA 总线仲裁器 硬件描述语言 

分 类 号：P715.7[天文地球—海洋科学]