一种为循环指令优化的硬件栈设计  

Hardware Stack Design for Loop Instruction Optimization

作　　者：李宇飞[1] 陈健[1] 付宇卓[1] 

机构地区：[1]上海交通大学微电子学院DSP教研室,上海200030

出　　处：《小型微型计算机系统》2005年第9期1587-1589,共3页Journal of Chinese Computer Systems

基　　金：国家"八六三"项目(2002AAIZ)资助.

摘　　要：在数字信号处理器(DSP)设计中,硬件循环指令对系统性能的提升具有重要意义.为实现硬件循环,本文引入硬件栈设计的思想,讨论了硬件栈带来的好处和它的不足;并详细介绍了为减少硬件栈的访问周期采用的几种优化方法,最终实现了硬件栈单周期的存储访问和调度.In the field of DSP （Digital Signal Processor） design, loop instructions supported by hardware improve the system performance significantly. To implement hardware loop, this paper proposes ideas on hardware stack design. The advantages and disadvantages which hardware stack brings are also discussed. In order to achieve single-cycle stack access, this paper introduces some optimization techniques to reduce stack access cycles.

关 键 词：硬件栈 循环 寄存器组 

分 类 号：TP331[自动化与计算机技术—计算机系统结构]