软件流水中隐藏存储延迟的方法  

Hiding Memory Access Latency in Software Pipelining

作　　者：刘利[1] 李文龙 陈彧[1] 李胜梅[1] 汤志忠[1] 

机构地区：[1]清华大学计算机科学与技术系,北京100084 [2]Intel中国研究中心编译组,北京100080

出　　处：《软件学报》2005年第10期1833-1841,共9页Journal of Software

基　　金：国家自然科学基金~~

摘　　要：软件流水是一种重要的指令调度技术,它通过同时执行来自不同循环体的指令来加快循环的执行速度.随着处理机运行速度的逐渐提高,存储访问延迟成为性能提高的瓶颈.为了减轻存储系统影响,软件流水结合了一些存储优化技术,通过隐藏存储延迟来提高性能.提出了一种延迟可预测的模调度算法(foresightedlatencymoduloscheduling,简称FLMS),它根据循环的特点来确定load指令延迟.实验结果表明,FLMS算法减少了阻塞时间,提高了程序性能.Software pipelining tries to improve the performance of a loop by overlapping the execution of several successive iterations, As processor gets much higher speed, the memory access latency becomes a bottleneck that restricts higher performance. Software pipelining has been combined with several memory optimization technologies for higher performance by hiding memory access latency. This paper presents a foresighted latency modulo scheduling （FLMS） algorithm which determines the latency of load instructions according to the feature of the loop. Experimental results show that FLMS decreases the stall time and improves the performance of programs.

关 键 词：软件流水 模调度涪储延迟 FLMS(foresighted LATENCY modulo scheduling) 

分 类 号：TP338[自动化与计算机技术—计算机系统结构]