一种基于FPGA的误码测试仪  

A error detector based on FPGA

作　　者：郑国惠[1] 陈友荣[1] 陈张健[1] 孟利民[1] 

机构地区：[1]浙江工业大学信息工程学院,浙江杭州310032

出　　处：《浙江工业大学学报》2005年第5期507-510,543,共5页Journal of Zhejiang University of Technology

摘　　要：FPGA是一类称为现场可编程逻辑器件中的一员,它被认为是一种专用集成电路技术.现今的通信系统大量采用FPGA作为系统的核心控制器件,将物理层上的各协议层的功能集中在FPGA内部实现,不仅提高了通信系统的集成,同时也减少了硬件和软件设计的复杂度.该文介绍了误码测试仪的工作原理,并采用Altera公司的FPGA芯片(EP1K30TC144-3)和单片机(89C51)实现了误码测试仪功能.设计时应用EDA技术和Verilog硬件描述语言,采用自上而下(Top-down)的设计方法编写程序,并通过单片机控制液晶屏显示误码率和工作状态.着重介绍了键盘模块、发端模块、收端模块和单片机模块等四个模块的设计与实现,并给出了相应程序的流程图.FPGA is one of the field-programmable logic devices and an ASIC technique. As a key control device in the communication system, FPGA can not only improve the system＇s integration, but also reduce the complexity of the hardware and software. This paper describes the principle and the design of error detector based on the Ahera＇s FPGA device（EP1K30TC144-3）and single chip microcomputer（89C51）. The EDA technology, Verilog hardware description language and the Top-down design are used in the programs of this devisce. And the single chip microcomputer controls the LCD to display the error rate and working statuses. In this paper, we give the design,the realization and the flow chart of the Analyzer＇s four principal modules.

关 键 词：误码仪 FPGA 单片机 

分 类 号：TN791[电子电信—电路与系统]