Fabrication and Characteristics of SOI-Based Single-Electron Transistor with in-Plane Side Gates  

作　　者：LONG Shibing LI Zhigang WANG Congshun, LIU Ming CHEN Baoqin ZHAO Xinwei 

机构地区：[1]Laboratory of Nanofabrication and Novel Devices Integration, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China

出　　处：《Chinese Journal of Electronics》2005年第4期613-615,共3页电子学报（英文版）

基　　金：This work is supported by the National Natural Science Foundation of China （No.60236010, 90207004, 60290081 and 90401002）.

摘　　要：For compatibility with CMOS technology, the Single-electron transistor （SET） is preferably made in silicon. In this paper, a Si-based SET with in-plane side gates is proposed, which is fabricated in a Silicon-oninsulator （SOI） substrate using Electron beam lithography （EBL） with high-resolution SAL601 negative or ZEP520 positive e-beam resist and high density Inductively coupled plasma （ICP） dry etching. With the structure and the process carefully controlled, the SET with a 70-nm-radius Coulomb island is successfully fabricated. The Rds -T characteristics of the SET indicate that the device has typical semiconductor characteristics and the co-tunneling phenomena are impossible to occur. The Ids - Vds characteristics of the SET at different values of Vg at 2K all show Coulomb staircases. And the good reproducibility of the Ids - Vds characteristics can also be realized. The corresponding dIds/dVds -Vds characteristics show the clear conductance oscillations at 2K. The Ids-Vg curve at Vds = 0.1V and T = 2K approximately exhibits Coulomb oscillations. The total capacitance of the SET is about 3 aF and its operation temperature reaches about 88K. The fabrication process is quite easy and this kind of Si-based SET has the advantages of simplicity, IC-orientation and compatibility with CMOS process.

关 键 词：Single-electron transistor In-plane side gates Electron beam lithography Coulomb staircase Conductance oscillation 

分 类 号：TN386[电子电信—物理电子学]