一种适用于数字音频的Δ-ΣD/A转换器  

A Δ-Σ Digital-to-Analog Converter for Digital Audio Application

作　　者：周琳[1] 李冬梅[1] 王志华[1] 

机构地区：[1]清华大学电子工程系,北京100084

出　　处：《微电子学》2005年第6期639-642,646,共5页Microelectronics

基　　金：国家高技术研究发展(863)计划"集成电路重大专项"资助项目(2002AA1Z1720);国家重大基础研究发展(973)计划资助项目(G2000036508)

摘　　要：设计了一种适于数字音频应用的18位48 kHzΔ-ΣD/A转换器。其内插滤波器采用时分复用和无需乘法器的设计,降低了硬件开销。Δ-Σ调制器采用5阶单环单比特量化结构,经FP-GA平台验证,可实现100 dB的带内信噪比。开关电容(SC)重建滤波器采用CSMC 0.6μm CMOS工艺实现,核心芯片面积为1.73 mm×1.11 mm,在5 V工作电源下,其功耗小于22 mW。An 18 hit 48 kHz △-∑ D/A converter for digital audio application is designed. For the interpolator, muhiplier-free and time division multiplex mode are used to reduce the hardware overhead. The △-∑ modulator em ploys a 5^th-order 1-bit quantzation loop, and a 100 dB in-band SNR was achieved on FPGA platform. The post switched capacitor （SC） filter was implemented in CSMC＇s 0.6μm CMOS process. The core chip occupies an area of 1.73 ram×1.11 mm, and it consumes less than 22 mW of power from a single 5 V supply voltage.

关 键 词：△-∑调制器 D/A转换器 开关电容滤波器 

分 类 号：TN792[电子电信—电路与系统]