5/3提升小波变换及逆变换的FPGA设计方法  

Method of design 5/3 lifting DWT/IDWT based on FPGA

作　　者：陈大科[1] 韩九强[1] 

机构地区：[1]西安交通大学电子与信息工程学院,西安710049

出　　处：《东南大学学报（自然科学版）》2005年第A02期211-214,共4页Journal of Southeast University：Natural Science Edition

摘　　要：研究了提升小波的硬件实现方法,根据FPGA器件具有快速逻辑处理能力的特点,采用流水线的加法及桶状移位操作指令,设计了一种适合FPGA实现的快速小波变换硬件结构.采用基于Matlab的设计工具DSP Builder,在Altera FLEX10K20器件上实现5/3小波变换及逆变换的功能,并在Quartus软件下进行综合、仿真及下载.实验结果证明采用FPGA实现提升小波变换具有处理速度快、代码可移植性强的特点.Hardware implementation of lifting wavelet transform is investigated. According to the characteristic of field programmable gate array＇s （FPGA） fast logic handling ability, the architecture suitable for FPGA implementation designed in pipelined adder and barrel shifter is presented. With digital signal process （DSP） Builder based on Matlab, the design of 5/3 lifting discrete wavelet transform （DWT）/inverse DWT （IDWT） was fulfilled with Altera FLEX10K20, and then it was synthesized, simulated and configured to FPGA chip with Quartus. The experimental results show that design DWT/IDWT by Flea is a way of high efficiency and flexibility.

关 键 词：提升小波变换 图像处理 现场可编程门阵列(FPGA) MAFLAB 

分 类 号：TN911.7[电子电信—通信与信息系统]