一种低电源电压带隙基准的设计  

CMOS Bandgap Reference with Low Supply Voltage

作　　者：王冬辉[1] 戴庆元[1] 葛启健[1] 

机构地区：[1]上海交通大学微纳科学技术研究院,上海200030

出　　处：《电子器件》2005年第4期806-808,共3页Chinese Journal of Electron Devices

摘　　要：设计了一种可以工作在1V电源电压下的CMOS带隙基准。普通的带隙基准是通过VBE(双极型晶体管的基极-发射极电压)和kVT(VT=k·T/q)的和来实现输出基准电平,由于器件本身的特性而决定了其输出电平一般在1.25V左右。本文的带隙基准通过两个分别正比于VBE和kVT和的电流的叠加来实现低电平输出。使用SMIC0.35um模型仿真,得该电路的输出电平为506mV。This paper proposes a CMOS bandgap reference circuit, which can successfully work with 1 V supply voltage. The most commonly used bandgap reference is carried out by the sum of VBE and kVT, for the built-in characteristics of active devices, the reference voltage always right around 1.25 V. The low voltage reference is realized by the sum of two currents which are proportional to VBE and kVr respectively.

关 键 词：带隙基准 低电压 CMOS 

分 类 号：TN432[电子电信—微电子学与固体电子学]