射频集成化薄膜电感的设计和制备  

RF Integrated Thin Film Inductance Design and Preparation

作　　者：郑梁[1] 史东强[1] 秦会斌[1] 

机构地区：[1]杭州电子科技大学CAE所,浙江杭州310018

出　　处：《杭州电子科技大学学报（自然科学版）》2005年第6期6-9,共4页Journal of Hangzhou Dianzi University：Natural Sciences

基　　金：浙江省自然科学基金项目(Z104621);模拟集成电路国家重点实验室基金项目

摘　　要：介绍了一种新型的基于硅IC模拟电路工艺的射频集成薄膜电感。描述了集成薄膜电感的工作原理。采用一个紧凑集总电路模型来等效模拟集成化电感的电路效应。结合硅基模拟IC工艺技术,采用磁性材料薄膜层的设计,给出薄膜电感工艺流程,制备了薄膜电感样品。在1MHz^1GHz的频率范围内对薄膜电感样品进行了阻抗特性和Q值的测试。样品串联电感值为5.52nH,在600~800MHz时,获得最大为1.4的Q值。In this paper, a novel RF integrated thin film inductance is presented. The operational principle of thin film inductance is described. A compact lumped model is used to simulate the characteristic of the integrated induetance. Magnetic material thin film is designed to be magnetic core. The manufacture process is shown based on analog IC technology. A series of thin film inductance are designed and fabricated. In the frequency range from 1MHz to 1GHz,the impedance and Q factor of inductance have been measured. The measured inductance is 5.52nil and the maximum Q factor is 1.4 from 600 to 800MHz.

关 键 词：射频集成化薄膜电感 集成电路工艺 工作原理 模拟电路 阻抗特性 

分 类 号：TN61[电子电信—电路与系统]