一种采用TDA8044的高速数字接收机的设计与实现  

Design and Application of a High Rate Digital Receiver Using TDA 8044 Demodulation Chip

作　　者：刘昌清[1] 郭兴波[1] 潘长勇[1] 杨知行 

机构地区：[1]清华大学电子工程系微波与数字通信国家重点实验室,北京100084

出　　处：《电视技术》2005年第11期51-53,共3页Video Engineering

摘　　要：采用Philip公司TDA8044数字解调芯片设计并实现了一种高速基带全数字接收机。它的最高合路数据可以达到90Mbps,与传统的模拟接收机相比,不仅具有体积小和性能稳定等优点,而且在相同信噪比下,误码性能有很大的改善。实验室测试数据表明,在对QPSK调制信号进行无纠错编译码解调时,在10-7量级,其误码性能优于模拟接收机0.8dB,而且随着信噪比增加,改善更加明显。A high rate base-band all-digital receiver based on TDA8044 demodulation chip of Philip Semiconductors is designed and implemented. The highest serial data rate is 90 Mbps. Compared with the conventional analog receiver, it is not only smaller and more stable, but also has great improvement on bit error rate. The laboratory test results show that when it is used to demodulate the modulated QPSK signal without error correction code, it has 0.8 dB gain on bit error rate compared with analog receiver at 10^-7, and the improvement is more distinct as the increase of the SNR.

关 键 词：基带全数字接收机 高速 TDA8044数字解词芯片 

分 类 号：TN949.197[电子电信—信号与信息处理]