嵌入式系统中MPEG-4解码IDCT的硬件实现和验证  

Realization and Verification of IDCT in MPEG-4 Decoding for SoC

作　　者：师超[1] 高谷刚[1] 杨军[1] 林博[1] 

机构地区：[1]东南大学国家专用集成电路系统工程技术研究中心,江苏省南京市210096

出　　处：《电子工程师》2006年第1期15-17,44,共4页Electronic Engineer

摘　　要：离散余弦反变换(IDCT)广泛应用于MPEG-4等视频压缩、解压缩应用中。在嵌入式系统中,IDCT运算的效率将直接影响MPEG-4实时解码性能。文中根据嵌入式系统的特点,提出了一种新的IDCT硬件实现方法,并采用了一种新的验证手段对该硬件实现进行了全方位的验证。该方案已经应用于一款SoC芯片中的硬件MMA(多媒体加速单元)中。IDCT is an important computing process and used in MPEG-4 decoding. In employment of SoC to do the MPEG-4 decoding , IDCT computation efficiency will impact the whole decoding performance because of the restriction of the ability of computing the SoC core. In this paper, we present a new realization method of IDCT and a new method to carry out the verification. This kind of realization has been used in a MMA module of a SoC.

关 键 词：嵌入式系统 MPEG-4 IDCT 验证 

分 类 号：TN47[电子电信—微电子学与固体电子学] TN911.73